CGS master divider (previous version)

CGS22 the CGS master divider module is series of dividers and "phase shifters" for converting a single clock pulse train into an array of frequencies. The incoming clock signal is divided into successive clock signals, each half the frequency (twice the period) of the previous. A 180° shifted output is also available for each of the six stages. On top of this, there are two additional networks that can be hardwired or switched to provide 90° and 270° outputs for two of the frequencies. Each output is of 50% duty cycle. There is also a reset input to allow for synchronization. The very first stage cannot provide 90° and 270° outputs.

A LED can be included for each of the sixteen outputs, enough to satisfy anyone with a love of flashing LEDs.

While untested, the module should work on 12 volts.

How to use this module
The purpose of this module is to divide down a system master clock (e.g. a VCLFO) to drive an array of sequencers or other timed events. The different phase outputs are to allow for modules that may trigger from the falling edge of a wave, or to allow for deliberate lagging of an event. It would for example be possible to have two sequencers running from this unit, one at 1/8 of the frequency of the other, their outputs being mixed to give a sequence that changes fundamental pitch each eight notes.

My prototype had one pair of 90° and 270° permanently wired into the second stage, while the other could be connected to any of the stages via a rotary switch.

A little on how it works


The master divider is a fairly simple circuit with a lot of repetition. The circuit consists of several distinct blocks. The first are the input shapers, made from IC1A and IC1B and their associated components. These take whatever signal is fed into the module and convert them to signals appropriate for driving the rest of the circuitry. With the values given, the sensitivity is set at around 2 volts, allowing triggering from signals with a +/- 10 volt swing, or with a 0V to +10 volt swing, both of which are common in modulars. The output wave forms of some modules will never fall below the 1.4V level, preventing triggering. This can be solved by increasing the value of the 10k resistor between pin 2 of IC1 and ground to 22k, or higher if needed.

IC1A is used to process the Clock input. The frequency of the clock signal determines the speed of the output pulses. It can be derived from an LFO, sequencer or any similar pulse source. It is best if a square wave is used, or the 90° and 270° output will be distorted if connected to the first stage.

IC1B and its associated components form a "gate to trigger converter", generating a narrow positive going pulse when the "Reset" input goes above the 2 volt threshold. This is used to reset the 4024 divider, and sends all "A" outputs HIGH, and "C" outputs LOW.

The inverters of IC2 are used to derive the 0° "A" outputs. Unlike a counter, these "A" outputs will all be HIGH when the divider is reset.

The exclusive OR gates of IC3 are wired into two identical networks, each which combines a output stage with the one above it to get the 90° and 270° outputs. The very top division would require the use of the clock signal, but has proved impractical. The QO output should not be used.

Construction


Before you start assembly, check the board for etching faults. Look for any shorts between tracks, or open circuits due to over etching. Take this opportunity to sand the edges of the board if needed, removing any splinters or rough edges.

When you are happy with the printed circuit board, construction can proceed as normal, starting with the resistors first, followed by the IC sockets if used, then moving onto the taller components. Make sure you substitute 2k2 resistors for the 1k resistors where marked on the overlay above.

Take particular care with the orientation of the polarized components, the electrolytics, diode, LEDs, transistors and ICs.

When inserting the ICs in their sockets, take care not to accidentally bend any of the pins under the chip. Also, make sure the notch on the chip is aligned with the notch marked on the PCB overlay.

I have specified a tantalum capacitor for improved power rail decoupling near the output drivers.

If you decide not to use the LEDs, a link should be installed in place of each LED. The 2k2 pull-down resistors should also be changed to 10k. Note, on the prototype boards, the 2k2 resistors are marked as 1k.

The inputs to the networks which generate the 90° and 270° outputs are labelled S1 and S2 on the PCB. For each network a two pole, six position rotary switch connects each input to two successive outputs of the divider available via the pads labelled Q1 to Q6. As it does not matter which input of each network is used, it is possible to run a single wire from each "Q" output to the rotary switch, where it is connected to two adjacent pins, the exceptions being for Q1 and Q6 which are connected to a single pin each. Q0 is not used.

Table showing how to wire up the two rotary switches:

Parts list
This is a guide only. Parts needed will vary with individual constructor's needs.