CGS delay development board
CGS44 the CGS delay development board has been designed to allow people to experiment with the Princeton Technologies PT2395 Enhanced Digital Echo IC. The delays produced by this chip are quite long, suitable for various forms of echo. As it stands it is not appropriate for use in chorus units or flangers, though it may be possible to achieve this by dropping address lines. Other areas such as the feedback network also need improvement over what has been suggested on the application notes for this device, thus this board, to give an easy starting point for such experiments.
A little on how it works
The board is made up of several distinct blocks, some of which are not connected in any way.
- A buffer for boosting the output signal up to levels suitable for synthesizer use.
- A basic compressor and
- A basic expander to reduce noise generated by the delay chip.
- The delay block itself.
- An experimenters area.
The delay circuit is based on the application note for the PT2395, and I recommend you seek out the appropriate file. The desired file is called "PT2395.pdf" and is 519k in size. Note that there are a number of errors in this app, note. It is even contradictory in places. There are several other versions of the app. note/data sheet, but all are cut-down versions, and are more or less useless.
This is one of those PCBs than can be assembled in a number of different ways to suit the builder's needs.
On the first run of boards, a track is missing. It runs between pin 4 of the NE570 and AGND (0 volts).
One builder says he got better results by adding a 10k resistor between pin 12 of the NE570 and ground (thus in parallel with the internal 30k resistor).
Note that some chips a mounted in the opposite direction to others on this board. Large arrows on the overlay make this clear.
There is a development area to the right end of the board, allowing a 74HC4046 and associated components to be fitted, including two 4024 divider chips. The theory is that voltage control of the delay can be achieved using the 74HC4046, and frequency dependent delays achieved using the phase-locked-loop. At this point this area has not been developed, and is up the individual experimenter to use or ignore as s/he sees fit.
|RA6||Pull-down resistor to be added if A6 line is cut.|
|RA7||Pull-down resistor to be added if A7 line is cut. There is no provision for resistor on the write line, so one would need to be added on the rear of the PCB.|
|Rfb||Value not specified in the app. note. Feedback resistor. Try something between 10k and 100k. There are two Rfb resistors.|
|RG||Gain setting resistor for the buffer. 47k would give a gain of 1, 4k7 would give a gain of 10, etc.|
|B IN||Buffer in. The input to the op-amp buffer.|
|BIOUT||Buffer inverted output.|
|B OUT||Buffer output.|
|C IN||Compressor input. Feed input signal in here.|
|C OUT||Compressor output. Feed this to the input of the delay|
|D IN||Delay input.|
|D OUT||Delay output.|
|E IN||Expander input. Feed from the output of the delay|
|E OUT||Expander output. Feed this to the buffer, if needed, or to your output jack via an external 1k resistor.|
|FB IN||Feedback input.|
|FB OUT||Feedback output. Basically a SPST switch is wired between these two connections to enable the repeat function. A variable resistor may give some degree of control to reduction of successive echoes. As it stands, a standard level control "potentiometer" will not work. (i.e. use two wires to the pot, not three. Earthing one end of the pot's travel will foul things up.)|
|+5||Connect to 5 volt power supply.|
|+15||Connect to 15 volt power supply.|
|-15||Connect to negative 15 volt power supply.|
|AGND||Analog ground. Connect to 0V at PSU if possible, or to 0 volt bus if not.|
|DGND||Digital ground. Connect to 0V at PSU if possible, or leave disconnected if not. There is a 10R resistor linking the two grounds on the PCB.|
|A6||Pair of pads. Provision to cut the trace and route the A7 address line through a switch for reducing the minimum delay. (untested)|
|A7||Pair of pads. Provision to cut the trace and route the A6 address line through a switch for reducing the minimum delay. (untested)|
|W||Pair of pads. Provision to cut the trace and route the Write line through a switch to allow for "holding" of a captured sample. (untested)|
|Reset||Not used. May be needed if experimenting.|
|SEL||Select between 64k or 256k modes if using 41256 RAM chip, or permanently wire to DGND if using 4164|
|SHORT||Sets short delay mode. Tie the other two length selectors to DGND. Connect this pin to +5 volts.|
|MED||Sets medium delay mode. Tie the other two length selectors to DGND. Connect this pin to +5 volts.|
|LONG||Sets long delay mode. Tie the other two length selectors to DGND. Connect this pin to +5 volts.|
Before you start assembly, check the board for etching faults. Look for any shorts between tracks, or open circuits due to over etching. Take this opportunity to sand the edges of the board if needed, removing any splinters or rough edges.
When you are happy with the printed circuit board, construction can proceed as normal, starting with the resistors first, followed by the IC socket if used, then moving onto the taller components.
Take particular care with the orientation of the polarized components such as electrolytics, diodes, transistors and ICs.
When inserting ICs into sockets, take care not to accidentally bend any of the pins under the chip. Also, make sure the notch on the chip is aligned with the notch marked on the PCB overlay.
This is a guide only. Parts needed will vary with individual constructor's needs.
- There are some capacitors marked as high precision in the app. note, and on the circuit diagram above. I suggest using 5% mylar capacitors or better (styrene, poly prop, poly carb, 1%, 2%, etc.) in these positions. Match them if you have a capacitance meter.
- PCB is 6" x 2" with 3mm mounting holes 0.15" in from the edges.
Readers are permitted to construct these circuits for their own personal use only. Ken Stone retains all rights to his work.
- Delay Development Board (archived) by Ken Stone, 2001, with permission of the author