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CGS pulse divider and Boolean logic (previous revisions) (view source)
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As well as the pulse divider, there are also four boolean logic elements. Two are basic inverters. If you apply a LOW (e.g. a gate output in its OFF state) they will give a HIGH (gate ON) output, and vice versa. The OR gate has two inputs, and gives a HIGH whenever one or both inputs are HIGH. The AND gate has two inputs, and gives a HIGH only when both inputs are HIGH. Both of these have built in LED monitors. Unlike the Analog Logic module, these are strictly for processing gate, trigger and clock signals.
== Some ideas on how to use this module ==▼
▲== Some ideas on how to use this module ==
Feed a clock signal into the input of the pulse divider. The divided signal is available simultaneously for each output. If running at audio frequencies, feed some of these to a mixer or other signal processing device. If running at low speed, try driving two different sequencers at the same time from different divisions.
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When inserting the IC in its socket, if used, take care not to accidentally bend any of the pins under the chip. Also, make sure the notch on the chip is aligned with the notch marked on the PCB overlay.
=== Notes ===▼
* On REV1.1 boards the output swing of the inverters are not limited like those in the other gates. Adding a resistor from the collector to emitter of the transistors (one per inverter) will reduce the "high" level output. I would suggest something in the range of 470R to 680R.▼
* Make sure you use a standard 4000 series CMOS, not 74XXX4000 series, e.g. CD4017, MC14017, HEF4017. Markings such as HC4017, HCT4017 imply 74HC4017 and 74HCT4017 and are unsuitable.▼
▲* This module will work on +/-12 volts. See the text for resistor value changes.
* A 10 to 22 ohm resistor can be used instead of the Ferrite beads. If you don't care about power-rail noise, just use a link instead.▼
* On some boards there is an unmarked capacitor near the power connector. This can be anything in the range of 10n to 100n, and ceramic, or it can be omitted altogether.▼
* PCB measures 6" x 2" with 3mm mounting holes 0.15" in from the edges.▼
== Parts list ==
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▲=== Notes ===
▲* On REV1.1 boards the output swing of the inverters are not limited like those in the other gates. Adding a resistor from the collector to emitter of the transistors (one per inverter) will reduce the "high" level output. I would suggest something in the range of 470R to 680R.
▲* Make sure you use a standard 4000 series CMOS, not 74XXX4000 series, e.g. CD4017, MC14017, HEF4017. Markings such as HC4017, HCT4017 imply 74HC4017 and 74HCT4017 and are unsuitable.
▲* A 10 to 22 ohm resistor can be used instead of the Ferrite beads. If you don't care about power-rail noise, just use a link instead.
▲* On some boards there is an unmarked capacitor near the power connector. This can be anything in the range of 10n to 100n, and ceramic, or it can be omitted altogether.
▲* PCB measures 6" x 2" with 3mm mounting holes 0.15" in from the edges.
== See also ==
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