CGS Serge Wilson analog delay: Difference between revisions

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== Construction ==
== Construction ==

[b]Please note that there is an error in the documentation and PCB for this project. The resistor marked 180k (R21) should in fact be 820k. Ken.[/b]

[[File:cgs_pcb_cgs208_wad.gif|thumb|center|800px|The component overlay for the VER1.0 PCB. Click through for an enlarged, printable version. Print at 300dpi.]]
[[File:cgs_pcb_cgs208_wad.gif|thumb|center|800px|The component overlay for the VER1.0 PCB. Click through for an enlarged, printable version. Print at 300dpi.]]
Before you start assembly, check the board for etching faults. Look for any shorts between tracks, or open circuits due to over etching. Take this opportunity to sand the edges of the board if needed, removing any splinters or rough edges.
Before you start assembly, check the board for etching faults. Look for any shorts between tracks, or open circuits due to over etching. Take this opportunity to sand the edges of the board if needed, removing any splinters or rough edges.
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| 100k 1%||align=right|2
| 100k 1%||align=right|2
|-
|-
| 180k 1%||align=right|1
| 820k <strike>180k</strike> 1%||align=right|1
|-
|-
| 182k 1%||align=right|2
| 182k 1%||align=right|2
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