CGS pulse divider and Boolean logic: Difference between revisions

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Line 1: [[File:cgs_photo_cgs36v14_pulse_divider.jpg\|center\|800px\|]] '''CGS36''' the '''CGS pulse divider ~~boolean~~Boolean logic''' module consists of several parts, a pulse divider with integer divisions between 2 and 8, and several logic elements. The divider is used to generate interrelated pulses for use in creating poly-rhythms, and unusual sequences. It can also be run at audio frequencies as a sub-oscillator/sub harmonic generator. The output pulse from each division is one clock cycle in length, and the relationship between pulses is fixed. Specifically, the /4 output will correspond to every second pulse from the /2 output. Likewise, the /8 will correspond to every second pulse from the /4 output, and the /6 will correspond to every second pulse from the /3 output. Needless to say, the /2 and /3 groups are not related to each other, or to the /5 or /7 outputs. All however share a common external reset, so they can be synchronized. All outputs go high on reset. As well as the pulse divider, there are also five ~~boolean~~Boolean logic elements. Two are basic inverters. If you apply a LOW (e.g. a gate output in its OFF state) they will give a HIGH (gate ON) output, and vice versa. The OR gate has two inputs, and gives a HIGH whenever ''one'' or ''both'' inputs are HIGH. The AND gate has two inputs, and gives a HIGH only when ''both'' inputs are HIGH. The fifth is an exclusive OR gate (XOR), giving a LOW when both inputs are within 1.2 volts of each other, and a HIGH when they are not. The OR, AND and XOR also offer inverted outputs, giving the option of using them as NOR, NAND and XNOR gates. Unlike the Analog Logic module, these are for processing gate, trigger and clock signals, although the XOR gate can accept linear inputs as well. * This module will work on +/-12 volts. See the text for resistor value changes.▼ == Some ideas on how to use this module ==▼ ▲== Some ideas on how to use this module == Feed a clock signal into the input of the pulse divider. The divided signal is available simultaneously for each output. If running at audio frequencies, feed some of these to a mixer or other signal processing device. If running at low speed, try driving two different sequencers at the same time from different divisions. Line 18 ⟶ 19: Following the input processor are four 4017 decade counters wired to give the various divisions. Where possible, sub-divisions have been taken from the same chip, with the various pulses being ORed together by diodes. Each output is buffered by an emitter follower. Many different types of small signal or switching transistors (e.g. BC547) can be used here without affecting the performance. [[File:cgs_schem_cgs36v14_boolean.gif\|thumb\|center\|800px]]] The ~~boolean~~Boolean logic are simple discrete R/DTL designs. When either input of the OR gate receives a voltage high enough, the first transistor is switched on, pulling the base of the second transistor low, and thus turning it on as well. This results in the output being pulled up to the voltage governed by the resistor divider. In the case of the AND gate, both input transistors must be turned on before the output transistor can be turned on, as the input transistors are in series with each other. The inverters are basically just the same as the first stage of the OR gate, with the exception of there being only one input. See CGS54 the [[CGS XOR /XNOR logic]] module for a further explanation of how the Exclusive OR gate works. == Construction == Line 151 ⟶ 152: \| colspan="2" align=center\| '''Misc.''' \|- \| Ferrite ~~Bead~~bead\|\|align=right\|2 \|- \| 0.156 4 pin connector\|\|align=right\|1 Line 158 ⟶ 159: \|} === Notes === * Make sure you use a standard 4000 series CMOS, not 74XXX4000 series, e.g. CD4017, MC14017, HEF4017. Markings such as HC4017, HCT4017 imply 74HC4017 and 74HCT4017 and are unsuitable. MC4017 is also unsuitable. ▲* This module will work on +/-12 volts. See the text for resistor value changes. * PCB measures 6" x 2" with 3mm mounting holes 0.15" in from the edges. == CC-BY-NC == Readers are permitted to construct these circuits for their own personal use only. Ken Stone retains all rights to his work. == See also == * [[CGS pulse divider and ~~boolean~~Boolean logic (previous revisions)]]▼ * [[CGS XOR /XNOR logic]], explains further how the Exclusive OR gate works.▼ * [[CGS parts FAQ]] * [[CatGirl_Synth#The_CGS_modules\|The CGS modules]] ▲* [[CGS pulse divider and boolean logic (previous revisions)]] ▲* [[CGS XOR XNOR logic]], explains further how the Exclusive OR gate works. == References == * [https://web.archive.org/web/~~20161209050532fw_~~20161209050532f/http://www.cgs.synth.net:80/modules/cgs36_pulse_divider.html Pulse Divider and Boolean Logic for music synthesizers.] ~~(archived)~~ by Ken Stone, 2001, with permission of the author - archived == External links == * [http://groups.yahoo.com/group/cgs_synth CGS Synth discussion group], for discussion of locating parts, modifications and corrections etc. * [http://bompiler.com/pcb/cgs36 CGS36 BOM] at BOMpiler === Suppliers === * [https://web.archive.org/web/20181128081357/http://www.elby-designs.com/webtek/cgs/cgs36/cgs36_pulse_divider.html CGS36 Pulse Divider], revision 1.4, Elby Designs [[Category:CGS ~~modular~~clock/gate/trigger processors]]