CGS pulse divider and Boolean logic: Difference between revisions

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(Created page with "center|800px| '''CGS36''' the '''CGS pulse divider boolean logic''' module consists of several parts, a pulse divider with intege...")
 
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The boolean logic are simple discrete R/DTL designs. When either input of the OR gate receives a voltage high enough, the first transistor is switched on, pulling the base of the second transistor low, and thus turning it on as well. This results in the output being pulled up to the voltage governed by the resistor divider. In the case of the AND gate, both input transistors must be turned on before the output transistor can be turned on, as the input transistors are in series with each other. The inverters are basically just the same as the first stage of the OR gate, with the exception of there being only one input.
 
See CGS54 the [[CGS XOR /XNOR logic]] module for a further explanation of how the Exclusive OR gate works.
 
== Construction ==