CGS weighted random switch

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CGS51 the CGS weighted random switch, (in memory of Jeff Pontius, this module was designed at his request) is another module for introducing unpredictability into synthesizers. The original requirement was for a circuit that would, upon receiving a clock signal, randomly direct a single input to one of four outputs, but with a twist. Four knobs or control voltages could be used to sway the likelihood of one or more outputs being selected over the others.

The concept has been expanded to include four gate outputs that correspond to the selected output, as well as a derived probability output CV for each of the four channels. What distinguishes these outputs from the input probability voltages is that they are post-multiplexer, and thus are interactive. Any change in any weighting control voltage, and all four of these outputs will be affected. They will be an approximation of the input voltage, and subject to some degree of fluctuation at the rate of the internal clock, though this can be adjusted to the users preference at construction time - thus the reason why no resistor or capacitor values have been specified in the buffer circuits.

The circuit is also designed to be expanded by the addition of one or more CGS analog switch matrix, allowing it to be used to route one input to four outputs, or vice versa, or even to route one signal through one of four external effects (e.g. wave multipliers, filters etc.).

The analog switch is DC coupled so can be used for both control voltages and audio signals, as is the minimal router in the basic version.

While untested, the module should work on +/-12 volts.

A little on how it works

The schematic of the Weighted Random Switch. Click through to view full sized.
The schematic of the onboard routing switch.
Power rail connections

The four weighted inputs, be they fed from external CVs or pots, are scanned by a 4 to 1 analog multiplexer (1A) at a high rate. The selected voltage is inverted and limited between 0 and 10 volts, then fed to a comparator (see below) and a VCO. The VCOs frequency is thus inversely proportional to the selected voltage - the higher the voltage, the slower the VCO. Thus the selected input voltage directly controls the amount of time it is selected - the lower the voltage, the shorter that input will be selected - the higher the voltage, the longer that input will be selected. While how long an input is selected has little effect on how this portion of the circuit works, it is the method by which the weighting is generated.

The address lines that are used to select the input CVs are fed via a latch to a second 4 to 1 analog multiplexer. Unlike the first, this multiplexer remains in a fixed stated until an external clock pulse is received via the CLK input (from a sequencer, rhythm unit, LFO etc.). When a clock pulse is received, the current address of the first multiplexer is latched. The chance of any particular address being latched is related to the length of time that particular input is being selected, as caused via the weighting voltages as described above. There are other factors involved too, such as relative clock rates, but these effects can be ignored in most circumstances.

There is an over-ride condition where an external clock pulse is ignored. If one of the weight determining CVs is below around 0.5 volts, it is deemed to be effectively zero - in other words, an unwanted state. The comparator detects this condition and blocks the clock pulse, so the second multiplexer holds the previous state. This may mess up the perceived weighing of that particular state, but it is preferable to selecting a state to which nothing is connected, thus the unit can be used to switch between 2, 3 or 4 different inputs as required.

One part of the second multiplexer (2B) is used to drive the gate outputs and the LEDs that show which output is active. The other part (2A) is either wired as a 1 to 4 signal router with direct connection o the panel jacks, OR as a driver for controlling the more complex CGS analog switch matrix.

The second part of the first multiplexer (1B) is used to drive the weighted CV outputs. These CVs are a bit "soggy" in their responses, and never reach zero. Theoretically when summed the result should always be the same. Thus if one increases, the other three will each decrease by a third of the increase. The LEDs give a vaguely fading indication of the result - useful in its own way, but very different to most LED displays seen in synthesizers. If desired the entire buffer/LED driver section associated with IB can simply be left out.


The component overlay. See here for a 300DPI printable overlay.

Due to a manufacturing error, the overlay on one version of these PCBs has become cluttered. Print out the above file to assist with assembly.

Before you start assembly, check the board for etching faults. Look for any shorts between tracks, or open circuits due to over etching. Take this opportunity to sand the edges of the board if needed, removing any splinters or rough edges.

When you are happy with the printed circuit board, construction can proceed as normal, starting with the resistors first, followed by the IC socket if used, then moving onto the taller components.

Take particular care with the orientation of the polarized components such as electrolytics, diodes, transistors and ICs.

When inserting ICs into sockets, take care not to accidentally bend any of the pins under the chip. Also, make sure the notch on the chip is aligned with the notch marked on the PCB overlay.

If you plan to combine this with the CGS analog switch matrix, omit the 100k resistor near the "SIG IN" pad, and omit all components in the outlined area containing the TL074.

Now for those unspecified component values:

  • RA is part of the filter determining the response of the weighted CV outputs. 100k is a reasonable choice. There are four RA resistors.
  • RB determines the frequency of the internal VCO. 10k is a reasonable choice, when used with a CB value of 47n. At 100k, the outputs start to behave sequentially, though this may be a desirable effect on occasion, so experimenters may wish to put a 250k linear pot in series with the 10k resistor to give them something to play around with.
  • RC determines the span of the VCOs response. The best span is achieved when this resistor is omitted.
  • CA is part of the filter determining the response of the weighted CV outputs. 47n is a reasonable choice when RA is 100k. There are four CA capacitors. At 10n, there is a distinct warble associated with these outputs, as determined by the speed of the VCO at any given moment. 100n may improve smoothing further if no warble is desired. The filter response is also affected by the speed of the VCO - if the VCO is being run vary fast, smaller capacitors will suffice. If it is being run particularly slowly, even the 100k/100n may be inadequate, though the effect could be interesting.
  • CB determines the frequency of the internal VCO. 47n is a good value.


  • On the first run of PCBs (no revision number) the 100n capacitor nearest the LM393 is not attached at one end. There are only two tracks near the pad - one track connects to the other end of the same capacitor, and the other track is the one you need to attach it to.

Parts list

This is a guide only. Parts needed will vary with individual constructor's needs.

Part Quantity
47p 1
100n 7
10n 3
10uF 3
CA 4
CB 1
470R 1
680R 8
820R 8
1K 5
2K2 2
10K 8
15K 1
100K 16
220K 1
RA 4
RB 1
RC 1
4013 1
4024 1
4046 1
4052 2
LM393 1
TL071 1
TL074 1
BC547 8
1N4148 16
10V Zener 1
Ferrite bead (or 10R resistor) 1
0.156 4 pin connector 1


  • PCB is 6" x 2" with 3mm mounting holes 0.15" in from the edges.


Readers are permitted to construct these circuits for their own personal use only. Ken Stone retains all rights to his work.

See also


External links