CGS pulse divider and Boolean logic (previous revisions): Difference between revisions

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Note: '''On the first run of the PCBs, the 820R and 680R in the AND gate were reversed.''' To get around this they were swapped in assembly. If not one output will be a little lower than the other. This isn't critical.
 
Note: '''On the first run of the REV1.2 PCBs, the boards were actually labelledlabeled REV1.1.''' They are identifiable because this revision mark is in the same box as the CGS36 ID. All Rev1.2 versions: the 1k5 in the second inverter should be 1k8.
 
VER1.3 PCBs have the upper part of the output dividers marked as RA on the PCB. These resistors are 1k8 for +/-15V operation and 1k5 for +/-12 volt operation. Likewise the two 1k8 resistors in the inverters should be 1k5 for 12 volt operation. The two 1k5 resistors in the OR and AND gates could probably be increased to 1k8 for 15 volt operation. Check your output voltages when you have assembled them. Ideally the voltages will swing between 0 volts and +5 volts. Some small variance either way is nothing to be concerned about.
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