Oscillator sync: Difference between revisions
Jump to navigation
Jump to search
Rescuing 1 sources and tagging 0 as dead. #IABot (v2.0beta10ehf1)
(Rescuing 3 sources and tagging 0 as dead. #IABot (v2.0beta10ehf1)) |
(Rescuing 1 sources and tagging 0 as dead. #IABot (v2.0beta10ehf1)) |
||
Line 35:
== Aspects of digital implementation ==
Naive approaches to sync in digital oscillators will result in [[aliasing]]. Methods such as [[additive synthesis]], BLIT ([[Band limited]] Impulse Train)<ref>www.music.mcgill.ca:[https://web.archive.org/web/20131006004705/http://www.music.mcgill.ca/~gary/307/week5/bandlimited.html bandlimited]</ref> or BLEP (band-limited step) must be adopted to avoid aliasing.<ref>www.cs.cmu.edu:[http://www.cs.cmu.edu/~eli/papers/icmc01-hardsync.pdf icmc01-hardsync.pdf]</ref>
In a digital oscillator, best practice is that the slave will not be reset to the identical phase each, but to a phase advanced by an equivalent time to the phase of the master at the reset. This prevents jitter in the slave frequency and provides truer synchronization.
| |||