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{| align="center" ...equencer2.jpg|center|200px]]|| ||[[File:cgs_photo_gate_sequencer1.jpg|center|200px]] ...

[[File:cgs_photo_cgs121_v10_mem.jpg|thumb|center|800px|]] [[File:cgs_schem_cgs121_mem.gif|thumb|center|819px|The schematic for Quad Comparator and Memory Cell module.]] ...

[[File:cgs_photo_uni33_a_mix.jpg|thumb|center|800px|]] [[File:cgs_photo_uni33_b_mix.jpg|thumb|center|800px|]] ...

<!-- file missing [[File:cgs_photo_cgs39_quad_gate.jpg|thumb|center|600px|]] --> [[File:cgs_schem_cgs39_quad_gate.gif|thumb|center|600px|The schematic of the Quad Logic Gate.]] ...

{|class="wikitable" style="text-align: center;" !style="text-align: center" colspan=2|Prefix ...

<!-- missing files {| align="center" ...cv_mega_mixer.jpg|thumb|center|100px|]]||[[File:cgs_photo_cgs241.jpg|thumb|center|100px|]] ...

[[File:cgs_photo_cgs89_gate_sequencer.jpg|center|800px]] [[File:cgs_schem_cgs208_wad.gif|thumb|center|900px|The schematic of the Wilson Analog Delay. Click through for larger vi ...

<!-- file missingg [[File:cgs_photo_cgs39_quad_gate.jpg|thumb|center|600px|]] --> [[File:cgs_schem_cgs39v2_logic.gif|thumb|center|900px|Quad logic gate schematic. Click through for larger.]] ...

[[File:cgs_photo_cgs33euro_a.jpg|thumb|center|400px|]] [[File:cgs_photo_cgs33euro_b.jpg|thumb|center|400px|]] ...

[[File:cgs_photo_cgs86pad_trk.jpg|thumb|center|800px|]] [[File:cgs_photo_cgs86_trk.jpg|thumb|center|800px|]] ...

[[File:cgs_photo_cgs89_gate_sequencer.jpg|thumb|center|800px|]] [[File:cgs_schem_cgs89_seq.gif|thumb|center|773px|The schematic of the main part of the Gate Sequencer.]] ...

[[File:cgs_photo_cgs37v11_cv_cluster.jpg|thumb|center|600px|]] ...ll amplitude, mixed with a differing amount of the modulating voltage. The center output has equal amounts of positive and negative modulation cancelling eac ...

[[File:cgs_photo_cgs88_bds.jpg|thumb|center|800px|]] [[File:cgs_schem_cgs88_bi-di_sw.gif|thumb|center|819px|The schematic of the Triple Bi-directional Router module.]] ...

[[File:cgs_photo_cgs35_syntha_vcf.jpg|thumb|center|600px|]] [[File:cgs_schem_cgs35_syntha_vcf.gif|thumb|center|600px|The schematic of the first Synthacon VCF PCBs.]] ...

[[File:cgs_serge_1_b.jpg|thumb|center|600px|Panel 1 from the rear]] ....org/w/index.php?title=Center_for_Music_Experiment_and_Related_Research -->Center for Music Experiment (CME) at the University of California, San Diego, and ...

[[File:cgs_photo_cgs37_cv_cluster.jpg|thumb|center|600px|]] ...ll amplitude, mixed with a differing amount of the modulating voltage. The center output has equal amounts of positive and negative modulation cancelling eac ...

[[File:cgs_photo_paraport.jpg|thumb|center|450px|]] [[File:cgs_schematic_paraport.gif|thumb|center|500px|Schematic diagram of the parallel port adapter]] ...

...rescale was replaced by an SPDT switch for the bypass function, and a SPDT center off switch was used to select between divide by 3, 7 and 5. 7 is hard wired [[File:cgs_schem_cgs01_subosc.gif|thumb|center|650px|Input stage of the sub-oscillator. Two are used, one per channel.]] ...

[[File:cgs_photo_cgs87s_prog.jpg|thumb|center|417px]] [[File:cgs_photo_cgs87_prog.jpg|thumb|center|800px]] ...

[[File:cgs_photo_lpg.jpg|thumb|center|800px|]] ''Variable center frequency is obtained by changing the value of two resistors simultaneously ...